Hey everyone – I’ve been dialing in my 9800X3D memory overclock, and hitting a wall with FCLK stability beyond 2100 MHz. Would appreciate any help or insight — just trying to find the sweet spot with my SFF/ITX rig.
I’m running a Ryzen 9800X3D on an ASUS ROG Strix B850I (ITX) inside a FormD T1 SFF case, paired with G.Skill Flare X5 6000 CL28 32GB (2×16) (SK Hynix A-die).
Goal was to run 6400 CL30 with FCLK 2133, but I couldn’t get 6000 CL28 at 2133 stable without pushing VSOC >1.23V and VDDG IOD/CCD >0.94V. Otherwise, I’d consistently freeze during Cinebench 2024 benchmarks. Other voltages have been at Auto/Expo as per scr shot.
Eventually I got it to run without freezing CB24, but ironically the CB24 score dropped slightly compared to when I was using FCLK 2100 with lower voltages — likely from reduced cpu boost due to increased thermals?
CPU is undervolted per-core using the glorious VID harmonisation method. System is already well stress-tested (see further below list of testing to date).
FCLK 2133 seems to be my wall, and I’d prefer to avoid pushing voltages too far due to SFF thermal constraints. Any ideas on whether I’m tuning the right voltages?
Questions for you more experienced fellows:
1) Am I tuning the right voltages for FCLK stability? Are VSOC + VDDG IOD/CCD the main two, or are there others I should focus on? How do VDDIO MEM_IO, VDDP, VPP, and VDD_MISC play into this?
- VDDIO MEM_IO is on Auto – but it’s sitting at ~1.4V. Is that too high?
- VDD_MISC is Auto (~1.1V). Is this worth tweaking?
- VDDP and VPP is currently default – do these influence FCLK stability?
- How much should i push these to try get ~FCLK 2167/2200 stable and will the CPU temp increase be worth it?
- Should i try 6000 CL26 at roughly current voltages?
2) I'm currently runnning Nitro 1-2-1, x8 x8. Would switching to 1-3-1 or 2-3-1 help at all, i have no struggle POSTing? I saw Buildzoid mention instability with 1-2-1 or 1-3-1 and only able to run 2-3-1, but is that more for POST rather than freezes?
3) Is Cinebench 24 even a good reference point for indicative performance gains? Temps hit max ~91–92°C in Cinebench, average ~89, but in actual games, CPU sits way cooler so would have less throttling/boost limits. Should I ignore slight Cinebench regressions if it means potentially tighter RAM? I mainly use this rig for gaming
4) RAM hovers around 50°C during AIDA64 (CPU/FPU/Cache/Memory), but only ~40°C in Cinebench. Should I be worried about these temps during tuning?
5) On tPHYRDL, I noticed unaligned (e.g. 34/36) gives better L2/L3 read speeds and write performance, with only ~+0.2ns latency penalty. Is it worth forcing alignment to 34/34 if unaligned wins in bandwidth?
6) During Cinebench, my average effective clock is ~20-25MHz below the average core clock. Is that normal?
Non-voltage BIOS tuning already applied:
- TSME: Disabled
- iGPU: Disabled
- SVM: Disabled
- Global C-States: Disabled
- Robust Memory Training: Enabled
- Memory Context Restore: Disabled
- Power Down Mode: Disabled
- Spread Spectrum: Disabled
- Memory Scrambling: Disabled
- Nitro: 1-2-1, x8, x8
Current stress tests to date:
- 50+ hours of CoreCycler + Prime95 (non-AVX)
- 22 hours of CoreCycler + y-cruncher
- AIDA64 CPU + FPU + Cache + Memory stress (2+ hrs)
- TM5 anta777 extreme & usmus25 config – a couple full cycles
- Was about to do overnight Karhu but wanted to get your feedback first before i venture off into final stability testing
6 Comments
Try fclk at 2200 and 1.15v soc and vddg to 0.950v (I believe it’s vddg from off the top of my head). Under 2200 fclk isn’t worth going for at 6000 mt/s.
The glorious VID what?
FCLK is affected by vSOC (lower = higher FCLK) and VDDG (higher = higher FCLK). Totally possible your CPU just can’t do 2133MHz as well.
Cinebench is not very good for testing memory, it’s mostly a CPU benchmark. To very specifically benchmark memory try y-cruncher. Also keep in mind that its possible to lose performance by pushing FCLK too high.
Probably cuz of timings and not fclk. Trcdwr 20 is probably the culprit, way too low.
You should use linpack xtreme to check for FCLK stability. Look for run to run deviation (fluctuating GFlops) and regression over time.
Main voltages relevant to FCLK are SOC and CCD + VDDG IOD. For SOC, lower is actually better for FCLK – especially if you’re just gonna run your mem at 6000, try 1.20V or less. Set CCD to 1050 and IOD to 950mV as a starting point.
VDDQ and VDDIO can help with higher memory clocks but is seemingly RAM or board dependant. Can both be set all the way to ~1.4V without much issues and tweaked downwards later.
Would definitely increase VDD mem to at least 1.5V unless you’re already running into temperature related instability already, clocks obviously and most timings scale well with more voltage. Would go as far as 1.6V for daily. It’s also possible to reduce tREFI and tRFC if you’re experiencing instability due to temps, rather than lowering the mem VDD, but I personally don’t prefer this approach.
V Soc the lowest you can go while maintaining IMC stability, vddg voltages start at .95mv and don’t go above 1.05v. That’s what I usually do. You may just have to bad luck with fclk cause I can run 2167 with 1.2v soc and nothing else
I need higher vddp (1.15)and vddg ccd/io 1050/1100 to stabilize fclk. Also 1.43 vdd/q/io