with these times I get stability. if I disable gdm, error in tm5. 3800 I can post, but errors in tm5. 4000 I can't post. maybe bad b-die or bad silicon?
Increase ProcODT. 40-48.
For me 40 is the baseline. Loose timings for clock for first, check if your CPUs capable for 1800+ FCLK. If passes, start lowering timings.
1.28vsoc 1.52vram voltage and your good for 3800mhz c14 and 1900fclk.
In my case there was a fclk Hole around 1880-1910. Bclk oc at 102.5 made it run 3830/1915 fclk and was rock stable !!
3 Comments
Increase ProcODT. 40-48.
For me 40 is the baseline. Loose timings for clock for first, check if your CPUs capable for 1800+ FCLK. If passes, start lowering timings.
FCLK is super hard to get past 1900. You can try to increase SOC etc. Check this guide: [https://docs.google.com/document/u/0/d/1FsUuYtjztbqgOiR3uUCtzlTyzB2WRFUm-kXbboECj2s/mobilebasic?pli=1](https://docs.google.com/document/u/0/d/1FsUuYtjztbqgOiR3uUCtzlTyzB2WRFUm-kXbboECj2s/mobilebasic?pli=1)
1.28vsoc 1.52vram voltage and your good for 3800mhz c14 and 1900fclk.
In my case there was a fclk Hole around 1880-1910. Bclk oc at 102.5 made it run 3830/1915 fclk and was rock stable !!