After latest BIOS update, I was finally able to get EXPO timings to work. They were pretty horrible, though, so I've tightened them up and managed to reduce voltage significantly. I think I can probably reduce VSOC some more, but getting some clock stretching under extreme load (only significant in OCCT Linpack – everywhere else only about 10-100 MHz off at worst, and not all the time). Can likely drop VDD/VDDQ/VDDIO some, too, as testing suggests I'm rock solid where I am (kit is rated for 1.4v @ EXPO timings.)
2 Comments
Is this stable for daily use/gaming?
Surprise this posts with only 1.35 v
I would max out FCLK if you can. If you’re able to run 6400 to hell with the syncing of memory controller and FCLK.
tRCDRD seems high. tRCDWR can be lowered A LOT.