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What is going on? Why can tRAS go so low without any errors? Is there an order with which I should tune the timings?
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What is going on? Why can tRAS go so low without any errors? Is there an order with which I should tune the timings?

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What is going on? Why can tRAS go so low without any errors? Is there an order with which I should tune the timings?

2 Comments

  1. DryClothes2894

    For Ryzen, tRAS can be basically ignored if tRC is set properly

    Obviously you should run tRC = tRP + tRAS

    Just set tRAS to 21 though because then the memory controller will ignore it, and your tRC will end up probably around high 30s to low 40s

    Also here is some other suggestions for some other timings cause the subs matter a lot

    tRRDS/tRRDL/tFAW Ideally 4-4-16, may need to run the long delay at like 6 or 8

    tWTRS/tWTRL best case would do 4-8, some strong B-Die does 3-7, but shoot for 4-10 at least

    tWR can prolly go around 12 or so

    Try to get tRFC as low as possible, Im geussing based on primaries this is some Hynix or Micron so it wont probably go super low like B-Die but just see how low you can go on that before it wont boot and then raise it back up like 30 to 40ish, it is temp sensitive to some amount though so keep that in mind if your getting errors only long into tests.

    tRDRDSCL/tWRWRSCL, best case do 2-2, 3-3 *should* work, but even 4-4 is still solid

    tCWL can do tCL – 2, or on some Hynix kits it can go waaay lower

    tRTP ideally down to 6 but even between like 8 to 10 is good

    tRDWR 8 should work but try 6 or 7

    tWRRD 2 is fine but try 1

    The “Same DIMM/Different DIMM” tRDRDSD/tRDRDDD/tWRWRSD/tWRWRDD timings can all be at 1 because your on single rank DIMMs and there is only one DIMM on each channel, the SC timings can be at 1 as well

  2. Still_Dentist1010

    [Use this guide for reference.](https://github.com/integralfx/MemTestHelper/blob/oc-guide/DDR4%20OC%20Guide.md) Tuning secondaries and tertiaries should be done before primaries tbh, some of them have more real world performance than the primaries do so setting them first can speed things up.

    tRAS is going to be one of the last few timings you’d set. As ideally, you’d want tRAS = tRCDRD + tRTP. My kit is currently running tRAS of 22 as my tRCDRD is 16 and tRTP is 6.

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