My Setup:
- CPU: AMD Ryzen 7 9800X3D
- Motherboard: ASUS ROG Strix X870-A Gaming WiFi
- RAM: Klevv CRAS V RGB 48GB (2x24GB) 7200MHz CL34 – Model: KD5KGUD80-72B340G
- Memory Die: SK Hynix, M-die (4.D)
- Currently running: 6200MT/s with FCLK 2200MHz – stable
Current Status:
My current timings are 100% stable in stress tests (OCCT 20min using 100% memory) but I know there's room for improvement in terms of latency. I've been reading about the tRRDL/tWTRL relationship and optimal SCL timings for 2x1R configurations.
What I've tried:
- Attempted 6400MT/s CL30 with FCLK 2100MHz but couldn't get it stable even with loose timings
- Settled on 6200MT/s which is rock solid
- Now focusing on tightening secondary/tertiary timings at this speed
What I want to achieve:
- Lower latency while maintaining stability
- Properly tune secondary and tertiary timings for M-die
- Optimize tRRDL/tWTRL relationship (currently aware of the 2:1 ratio rule)
- Set correct SCL timings for single-rank setup
Questions:
- What should my tWTRL be if tRRDL is 12? (I believe it should be 24)
- For 2x1R setup, should SCL timings be 5/5/1/1?
- Any other M-die specific optimizations I should consider?
- Is my tRFC too loose at current settings?
ZenTimings screenshot attached below – any suggestions welcome!
Thanks in advance for any help! 🙏