Hey all, decided to do some memory tuning and noticed I’m getting relatively low Read and Copy results, particularly compared to write – and to others results I’ve seen online.
* MSI X670-P (Latest Beta Bios, Agesa 1.2.0.1)
* G.Skill F5-6000J3038F16GX2-TZ5NR (F56000J3038F16G) Hynix A-Die
* 7800x3D (stock, no PBO applied during testing)
* VDD/VDDQ 1.50v (out of range in zen timings)
Any help appreciated!
IbeebZz
The read and copy do seem low, have you run any tests for stability?
Normal for single ccd, I run 2400 2200 and get 70k read
zeldaink
tRC shouldn’t be lower than tRAS+tRP, as per Micron. It’s spending its time precharging, instead of keeping the row open.
Other than that, check for unstable IF. Sometimes lower voltage helps, or you need more voltage on the IOD.
Dvevrak
Only dual chips like 7900 & 7950 support full ddr5 speeds, 7800 and below can only achieve ddr4 speeds in reading and copying, Sadly amd is not very interested to support and take advantage of fast memory, probably because the gains do not equal the development cost.
6 Comments
Hey all, decided to do some memory tuning and noticed I’m getting relatively low Read and Copy results, particularly compared to write – and to others results I’ve seen online.
* MSI X670-P (Latest Beta Bios, Agesa 1.2.0.1)
* G.Skill F5-6000J3038F16GX2-TZ5NR (F56000J3038F16G) Hynix A-Die
* 7800x3D (stock, no PBO applied during testing)
* VDD/VDDQ 1.50v (out of range in zen timings)
Any help appreciated!
The read and copy do seem low, have you run any tests for stability?
Single CCDs Ryzens have lower limits for read©
Normal for single ccd, I run 2400 2200 and get 70k read
tRC shouldn’t be lower than tRAS+tRP, as per Micron. It’s spending its time precharging, instead of keeping the row open.
Other than that, check for unstable IF. Sometimes lower voltage helps, or you need more voltage on the IOD.
Only dual chips like 7900 & 7950 support full ddr5 speeds, 7800 and below can only achieve ddr4 speeds in reading and copying, Sadly amd is not very interested to support and take advantage of fast memory, probably because the gains do not equal the development cost.