I made this short reference/guide for all the main AM5 DDR5 voltages and how they generally affect RAM tuning. Figured I'd post it here for others to use since it's not the easiest to find this information out there

Note: the bulk of the reference material comes from Imprezzion on OCN. I've just cleaned up the formatting a bit and added some notes to help others, which will be denoted by "Editor's Note" sections after the source paragraph for the specific voltage.

Feel free to also comment with any clarifying information, as the original post is a little outdated at this point in the DDR5 OC scene (December 2024)

Edit: also remember that too much voltage will cause instability the same way that too little voltage will. Use this reference as a guide to choosing levers to play around with for specific changes, but also realize that just piling on the voltage is very unlikely to help

 

Reference Guide

VSOC

Controls FCLK and MCLK stability. In general more memory clock requires more vSOC, more FCLK requires less vSOC. Max is 1.30, sometimes 2200 FCLK is not stable at 1.30, it needs less.

 

VDDP

For memory controller frequency (mclk/uclk) stability basically but doesn't scale linear to 2:1 mode. So for 6400 you usually need some level of positive VDDP but 8000 can run on an undervolt generally. Normal range is 0.900-1.150v.

Editor's note: also one of the main levers for stabilizing low Nitro along with VDDGs

 

VDD

Is memory DIMM voltage. Explains itself. Max daily without active cooling probably 1.50 ish. With active cooling 1.650.

Editor's note: one of the most dependent settings on VDD is tCL. tCL can basically go as low as you are comfortable feeding VDD

 

VDDQ

Is a signalling voltage. Lower is better but it's not that crucial. Normal range is VDD to VDD -0.200 ish. Never above.

Editor's note: a lot of tight tunes I've seen just use the EXPO default 1.45V, my own included. However, in my experience, higher can help stabilize very tight tRFC (at least in A die)

 

VDDIO

Also memory controller / MCLK/UCLK related. For 1:1 must be quite high sometimes, ranges from 1.20-1.50. For 2:1 almost irrelevant due to half speed controller and can be undervolted.

Editor's note: more than 1.45V is rarely ever needed, even 1.4V is about the most 99% of tunes will ever need. For example, I have 6400cl26 dual rank 2x32gb ram, and I only need 1.39V VDDIO. The only profiles that may need more than 1.45V are very high capacity (128gb+) or very high MCLK (6600 MT/s+ in 1:1 mode)

 

VPP

Never touched it. Not needed.

 

VDD_MISC

Is a control voltage that other voltages like VDDG's use to convert from. Not very critical for stability and can generally be undervolted slightly but should be left auto. 1.00v generally works with auto VDDG's as they are still >0.100v lower.

Editor's note: it's mentioned a little at the end there, but just to clarify, VDD MISC should always be at least 0.1V higher than your highest VDDG voltage. So for example, if VDDG IOD is 1.05V and VDDG CCD is 1V, then VDD MISC needs to be at least 1.15V