I feel like I am chasing the dragon now… if I achieve a better read bandwidth, it is accompanied by a failed TM5 result (anta777 extreme, absolutnew, 1usmus_v3 – the only time I pass 1usmus_v3 and then fail extreme/absolut is when the issue is too low tRFC). D-die tRFC floor seems to be between 294 – 300ns, with 300ns achieving stability at or above 3600Mhz, but quickly becoming problematic above 3600 MHz assuming you've tightened other timings to the optimal values. At that point I found that you can find the best value between 300 and 350ns. XMP profiles for this ram ALL end up using a tRFC value that results in 350ns.
The timings I have in this post are almost exactly the same as the anta777 extreme/absolutnew pass result I had last night. D-die is very picky and weird sometimes, for example, I can lower tCL sometimes all the way down to 16 even with big overclocks like this one as long as i don't touch the other timings, and the benchmarks don't really seem to change and at a certain point have the opposite effect and result in worse latency/bandwidth. Basically, it will let you post but its clearly making adjustments behind the scene and you aren't actually running at a lower CAS latency as far as I can tell.
tRAS and tRC on D-Die are absurdly important, or maybe I did something wrong to make tRC so important, as it is my understanding that it's an extension timing? Personally, I think it is the IMC/D-die because I have always noticed how sensitive tRAS/tRC have been in my overclocking attempts. tRAS 44 and tRC 65 are the optimal values for my ram overclocked to 3800 MHz. Lower speed = lower optimal values, but same speed and different tRTP/tRP/tRCD does not change the fact that if I raise tRC at all, it will yield inferior results, and if I lower it at all, I will lose stability. If I lower it to 62 I may not post, maybe other settings/SOC voltage/DRAM voltage can help A LITTLE bit with whether you post or not, but that's all) and if I lower below 62 at 3800 MHz – 100% no shot at posting it won't happen.
tRP at 19/20/21 don't seem to be much different from one another, at least I would need to do more testing and actually track the results to discern any difference so for all intents and purposes it doesn't matter to me. TRCDRD < 21 = unstable.
My goal: I am trying to achieve 90% of theoretical maximum. I cannot seem to pass 88% at 3800 MHz or 89% at 3733 MHz. It makes sense to me that I was only able to achieve 90% at 3600 MHz given that seems to be the agreed upon sweet spot for Ryzen 3000 series (or maybe it was for Zen 2 in general?) – and that was with tight timings that were never stress/stability tested, anyway. Not to mention, 88% of 3800 MHz theoretical maximum is better than 90% of 3600 MHz theoretical maximum. Am I unable to do better than 53,400 MB/s (stable) because of the Ryzen 3700x's IMC? Should I be happy with what I've got and move on or am I leaving performance on the table?
I noticed significant performance gains in easy-to-run games such as Classic World of Warcraft. I finally drew the connection that this has to do with cache speed and latency and how much of a bottleneck it can be when you are in a crowded city during peak hours. It explains why lowering graphics settings like shadows/anti-aliasing/texture resolution/particle effects barely helped with this, as it was a pretty substantial bottleneck. It also explains why newer processors on both the intel/AMD side are able to massively outperform my 3700x in crowded cities/raids. (Broken record): It also explains why limiting the game to only 1 CCX results in a significant FPS gain in all scenarios but especially in densely populated areas. The better my ram is overclocked, the less of a difference it makes if I limit it to only 1 CCX (however it is still superior to do so even with optimally OC'd ram).
I plan to see if I can get tWR down to 12 and tRTP down to 6. tRDRD/tWRWR SCL at 4 seem to offer no gains from 5, and 3 doesn't boot. Research seems to suggest that this is common and that there's no reason to go with the lower value if there are no gains. I question if those gains at a lower value can be "unlocked" by lowering other timings. Maybe now that I have tightened stuff more, tRDRD/tWRWR SCL at 4 will offer improvement that was bottlenecked before? I'm unsure/lack the knowledge to know, maybe someone here can educate me.
Leaving tRDWR/tWRRD on auto on this board (Asrock B550 Pro4 on the latest stable release) seems to always provide the correct values with everything else filled in. Trying to adjust these values once automatically chosen has only resulted in not posting. I know of it's relation to tCWL and to each other (i.e. in my case I could raise tWRRD to 2 and lower tRDWR to 10, and I plan to see if making changes like this allows me to achieve a higher stable read bandwidth). Something I often notice is that the write speed is just about perfectly 50% of the max theoretical bandwidth. The 50% part I understand, but why isn't it 44% (half of 88%) to be in line with the read bandwidth? Is this a part of my bottleneck assuming there is one? Would raising tWRRD to 2 or 3 and lowering tRDWR to 10 or 9 potentially reduce the write speed and increase read speed without affecting anything else, or am I misunderstanding these timings?
Does raising CLDO VDDP/CCD/IOD impact bandwidth if you do not adjust timings? Or would this only ever impact stability (as is my current understanding). My current DRAM Voltage is 1.45 volts, higher voltage did not resolve errors that ended up being due to either too low tRFC or too tight tRCD/tRAS/tRC, even voltages as high as 1.55 which D-die can handle but simultaneously seems to be wasteful and unnecessary, and would likely lead to instability once temps reach 45-50 degrees. Under 45 degrees, this ram is stable with tight timings. With loose timings, it is stable up to 52 degrees. I have never done anything to make this ram go above those temps. I have no ram fan but a decent aftermarket CPU air cooler/heatsink as well as a room fan positioned a few feet away near the AC vent in my room, which effectively directly the cold AC air directly at my tower's intake fans. The GPU (RTX 3060ti) has both its fans running at 80-85% at all times to aid in moving warm air away from the ram sticks.
There might be more optimal timings for tWTRS/L as well, auto sets them to 5/14 respectively. 4 doesn't post. 5/12 actually seemed to be better than 5/9 5/10 I used to run but I am unsure if that was purely due to changing that or if it was accompanied with other adjustments. I likely made other changes along with it and simply haven't circled back to these timings as they have been pretty inconsequential so far in my experience. Maybe an oversight?
Sorry for the wall of text, I wanted to provide as much info as possible. TLDR: Asrock B550 Pro4, Ryzen 7 3700x, 53,400 MB/s max stable read bandwidth. This is ~88% of theoretical maximum, and ~1500 MB/s better than 90% of 3600 MHz maximum which I have achieved but see no reason to utilize over my current freq/timings. Am I at the mercy of the 3700x IMC/is this the best my ram can do or can I make timing adjustments I haven't considered yet? I have pushed it up to 54,000 MB/s read and this was unstable. I haven't even achieved 55,000 MB/s unstable, let alone stable.