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Hey guys,
I’ve been attempting to optimize my 6000CL30 Hynix A-Die kit, mostly for fun. I seem to have gotten my system to stay stable at 6400CL28 at 1.5 V VDD after 8 cycles in Absolut MemTest5. Just wondering if these numbers in AIDA would line up with what they should be at these timings and clocks or if the timings and bus settings could be optimized a little, I’ve mostly just been copying what I’ve been seeing without completely understanding what everything does lmao. Alot of the settings I used were from Buildzoid, and I believe KedarWolf and Veii on [overclock.net](https://overclock.net).
Any advice is appreciated, thanks in advance.
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